About Us:
Montage Technologies has opened a new U.S. location in the Johns Creek, GA area. We are a leading semiconductor company specializing in enterprise class memory products. There will be many hands-on learning experiences with significant program ownership and career growth.
Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing.
Job Description:
As a Validation/Hardware Engineer, you will be responsible for engineering characterization, and failure analysis of DDR memory, CXL, PCIe, and PMIC systems at Montage Technology, you will be a key contributor in ensuring the reliability, performance, and compatibility of our enterprise-class components and technologies. You will work closely with cross-functional teams to develop and execute validation plans, build validation hardware, and implement automation to ensure our system solutions meet the highest quality standards. Key Responsivities are:
- Developing tools and methods for programming, training and validating DDR, CXL, PCIe, and PMIC hardware;
- Conducing engineering characterization, customer support, and failure analysis of DDR, CXL, PCIe, and PMIC hardware to understand its performance characteristics, designing and running experiments, analyzing data, and presenting the findings to other team members;
- Performing testing and validating early silicon against industry specifications, analyzing the performance and behavior of security, DDR, CXL, PCIe, and PMIC hardware to ensure that they meet the required specifications;
- Investigating and resolving issues identified during testing to identify the root cause of failures and work closely with design and development teams to find solutions;
- Evaluating the performance of DDR, CXL, PCIe, and PMIC hardware by measuring data transfer rates, latency, power consumption, and other relevant parameters, and analyzing performance data and identify areas for improvement;
- Conducting failure analysis of system hardware to understand the roots of bugs and methods of preventions in the future system debugging, margin or training failures;
- Maintaining detailed test plans, test reports, and documentation of validation procedures, and documenting any issues encountered, along with the steps taken to reproduce and resolve them;
- Cross-functional collaboration: collaborate with hardware and software teams to address and resolve validation and performance issues, ensuring product readiness for market release.
Qualifications:
- Bachelor's or Master’s degree in Electrical Engineering;
- Strong experience in DDR4 and DDR5 memory system, PCIe, or PMIC validation;
- 3+ years of relevant work experience;
- Experience with signal integrity and equalization techniques;
- Proficiency in Python and C++ programming for test automation, firmware development, and data analysis;
- Experience with memory controllers, firmware, and BIOS development is a strong plus;
- Solid understanding of memory system architecture and industry standards;
- Strong problem-solving skills and attention to detail;
- Excellent communication and teamwork skills;
- Experience in testing and validation methodologies.
Job Responsibility：
- Perform analog and mixed-signal physical design;
- Perform layout verification (DRC, LVS);
- Modify and verify in-house DRC & LVS command files.
Job Qualification：
- BS with experience in IC layout experience;
- Good understanding of basic electronic principles dealing with circuit and layout design;
- Familiar with IC layout methodologies and flows;
- Familiar with CAD tools such as Cadence virtuoso layout, PCELLs, Calibre physical verification;
- Familiar with Calibre DRC & LVS command files;
- Prior experience with stand-cell built is a plus.
About Us:
Montage Technologies has opened a new U.S. location in the Johns Creek, GA area. We are a leading semiconductor company specializing in enterprise class memory products. There will be many hands-on learning experiences with significant program ownership and career growth.
Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing.
Job Description:
We are looking for Verification Engineers who will help develop system level UVM test benches for various DDR5 DIMM products, Power Management IC (PMIC) and also CXL 2.0 products. Your contribution would be to lead and work with other global team members in building the infrastructure for system level SoC testing. You will also be responsible to functionally verify the system and IP components, using SystemVerilog and mixed signal verification techniques.
Key Responsibilities:
- Be knowledgeable in DDR5 DIMM system level verification and PMIC IP verification;
- Collaborate closely with component testing verification teams across our global sites;
- Interface with other engineering functions such as Design, Product, Spec Engineering;
- Be involved in silicon debug when necessary;
- Develop, drive and implement UVM SystemVerilog Testbench and infrastructure;
- Develop stimulus, coverage, SV assertions, scripts as necessary;
- Provide mentorship to junior engineers;
- Debug regressions and failing simulations.
Qualifications:
- BS or MS in Electrical Engineering, Computer Engineering or equivalent;
- 5+ years of relevant work experience;
- Good understanding of CMOS circuit design;
- Strong understanding and hands on experience in building UVM Testbenches from scratch;
- Proficient with digital and analog simulation tools, e.g.: VCS, Xcellieum, Verdi etc.;
- Excellent debugging and problem solving skills;
- Strong understanding of DDR5 protocol or CXL 2.0 spec.
Job Responsibility：
- Help develop next generation of solutions for advanced memory interfaces of data centers;
- Perform high speed SI simulation and analysis;
- Extraction of channel model using standard industry tools;
- Lab measurements of interconnect channel in frequency and time domains.
Job Qualification：
- MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;
- Solid knowledge of Electromagnetic and Microwave;
- Experience in high speed SI/PI simulation and analysis;
- Mastering measurement tools like oscilloscope, VNA, TDR/TDT;
- Knowledge of a programming or scripting language in a Windows/UNIX environment;
- Excellent technical communication skills.
Job Responsibility：
- Develop system board for IC validation;
- Work on IC function verification and performance test;
- Develop evaluation board for demonstration and evaluation;
- Develop reference board for customer design;
- Support customers to facilitate their product development cycles.
Job Qualification：
- BSEE or MSEE with experience in hardware development;
- Experience in application development;
- Familiar with lab equipments, such as oscilloscope, spectrum analyzer, network analyzer, etc.
Job Responsibility：
- Define and develop package solution for high speed, high power and large pin count device in a cross-function team;
- Design rule development and implementation of in-house packaging layout to meet product requirements;
- Interface with vendors on process optimization, chip characterization and failure analysis for volume production;
- PI/SI analysis on full chip and critical IPs at package level;
- Drive new technology development such as multi-die, advanced substrate, design for manufacturability and design for reliability, as a collaborative effort with vendors.
Job Qualification：
- Education: Bachelor Degree or above, Master is preferred. Major in Electrical Engineering/Microwave/Microelectronics/Physics etc.;
- Hands on experiences with layout of FCBGA, MCM, SiP, WLBGA etc and optimization for ball count and power grid;
- Experience on design of very large form factor flip chip package with high substrate layer count;
- Experience with high-speed IO interfaces design and PI/SI analysis, such as DDR and PCIe is preferred;
- Experience on mechanical and thermal analysis and control, knowledge on mechanical and thermal reliability is a plus;
- Capability of driving package roadmap to meet future products on advanced nodes.
Job Responsibility：
- Participate new product qualification (ESD, LU Life test) per requirement;
- Complete correlation/char test and data analysis;
- New product induce to production.
Job Qualification：
- B.S Degree ,Major in Electronics/Electrical Engineering;
- Experience in consumer electronics working experience;
- Working experience in fast pace semi-conductor manufacturing environment;
- Process a good sense of responsibility and positive working attitude;
- Good written and oral communications skills;
- Able to understand, debug, modify and improve test program.