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M88DS3000/2 – Advanced DVB-S/S2 Demodulator
The M88DS3000/2 is an advanced single-chip demodulator for digital satellite television broadcasting system. It is fully compliant with the DVB-S/S2 standard and can support QPSK, 8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast,
easy-to-apply and cost-effective solution for digital satellite receiver front-end design.
The M88DS3000/2 accepts baseband differential or single-ended I and Q signals from a tuner,
then digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport
stream. The M88DS3000/2 supports symbol rates from 1 Msps to 45 Msps, and code rates
from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier recovery,
performance monitoring, co-channel interference cancellation, command interface, and
DiSEqC™ 2.X interface, etc. The device is controlled via a serial 2-wire bus.
The M88DS3000/2 works properly with 1.25 V and 3.3 V voltage supplies. Typically, the power
consumption is around 350 mW.
 Feature
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Multi-standard demodulation |
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Compliant with DVB-S/S2 specifications |
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QPSK, 8PSK, 16APSK and 32APSK demodulation schemes |
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Maximum channel bit rate is 130 Mbps |
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Maximum symbol rates are: 45 Msps for QPSK and 8PSK; 36 Msps for 16APSK and |
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28 Msps for 32APSK |
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DSP features |
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Symbol rate sweeping |
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I/Q impairment cancellation |
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Automatic spectrum inversion |
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Adaptive equalizer for RF reflection removal |
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Roll-off factor automatic identification |
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Fast blind scan |
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High performance on-chip micro-controller |
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Multi-error monitor |
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Accurate SNR estimation |
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Multi-lock indicators |
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Clipping rate reporter |
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DC removal |
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Automatic frequency correction |
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Fast timing loop acquisition |
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Robust frame synchronization scheme |
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Phase noise indicator |
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Fast system recovery from fading or other abnormal conditions |
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Co-channel interference cancellation |
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Constellation monitor |
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Interface |
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DVB-S/S2 common, parallel and serial MPEG output interfaces compliant |
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Serial 2-wire bus to configure the device |
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2-wire bus repeater for tuner configuration |
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DiSEqC™ 2.X compliant interface |
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General purpose output |
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Dedicated reference clocks (13.5MHz / 27MHz) generation |
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System |
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On-chip 8-bit ADC |
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On-chip PLL for system clock generation from a 27 MHz external clock or quartz |
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crystal |
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Sleep mode supported |
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Technology |
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Power supplies: 1.25 V and 3.3 V |
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Low power consumption: 350 mW |
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Green package: LQFP 100-pin exposed pad (M88DS3000); 64-pin QFN (M88DS3002) |
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Application
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Digital satellite set-top boxes |
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Digital satellite receivers |
For detailed information about the products, please contact Montage Sales.
Tel: +86 21 51696833
Email: sales@montage-tech.com
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