Montage Technology(Shanghai) Co.,Ltd

M88DS3000 – DVB-S/S2 Demodulator

The M88DS3000 is an advanced single-chip demodulator for digital satellite television broadcasting. It is fully compliant with the DVB-S/S2 standard and can support QPSK, 8PSK, 16APSK and 32APSK demodulation schemes. The chip provides a fast, easy-to-apply and cost-effective solution for digital satellite receiver front-ends.

The M88DS3000 accepts baseband differential or single-ended I and Q signals from a tuner, then digitizes, demodulates and decodes the signals, and finally outputs an MPEG transport stream. The M88DS3000 supports symbol rate from 1 Msps to 45Msps, and code rate from 1/4 to 9/10. Its features cover blind scan, fade detection, timing and carrier recovery, performance monitoring, co-channel interference cancellation, command interface, and DiSEqC™ 2.X interface, etc. The device is controlled via a serial 2-wire bus.

The M88DS3000 works properly with 1.25 V and 3.3 V voltage supplies. Typically, the power consumption is around 350 mW.

Feature

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Multi-standard demodulation

	-	Compliant with DVB-S/S2 specification
	-	QPSK, 8PSK, 16APSK and 32APSK demodulation schemes
	-	Maximum channel bit rate is 130 Mbps
	-	Maximum symbol rates are: 45 Msps for QPSK and 8PSK; 36 Msps for 16APSK
		and 28 Msps for 32APSK

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DSP features

	-	Symbol rate sweeping
	-	I/Q impairment cancellation
	-	Automatic spectrum inversion
	-	Adaptive equalizer for RF reflection removal
	-	Roll-off factor automatic identification
	-	Blind scan for programming search
	-	High performance on-chip micro-controller
	-	Multi-error monitor
	-	Accurate SNR estimation
	-	Multi-lock indicators
	-	Clipping rate reporter
	-	DC removal
	-	Automatic frequency correction
	-	Fast timing loop acquisition
	-	Robust frame synchronization scheme
	-	Phase noise indicator
	-	Fast system recovery from fading or other abnormal conditions
	-	Co-channel interference cancellation
	-	Constellation monitor

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Interface

	-	DVB-S/S2 common, parallel and serial MPEG output interface compliant
	-	Serial 2-wire bus to configure the device
	-	2-wire bus repeater for tuner configuration
	-	DiSEqC™ 2.X compliant interface
	-	General purpose output
	-	Dedicated reference clocks (13.5MHz / 27MHz) generation

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System

	-	On-chip 8-bit ADC
	-	On-chip PLL for system clock from a 27 MHz external clock or quartz crystal
	-	Sleep mode supported

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Technology

	-	Power supplies: 1.25 V and 3.3 V
	-	Low power consumption: ~350 mW
	-	Green package: LQFP 100-pin exposed pad

Application

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Digital satellite set-top boxes

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Digital satellite receivers

Block Diagram

For detailed information about the products, please contact Montage Sales.

Tel: +86 21 51696833
Email: sales@montage-tech.com