| DSP Engineer |
| IC Design Engineer I |
| IC Design Engineer II |
| IC Design Engineer III |
| IC Design Engineer IV |
| Software QA Engineer (Intern) |
| CAD Engineer |
Contact Info for Applicants: hr@montage-tech.com
| DSP Engineer |
| Job Description: |
| - |
Design and implementation of algorithms for audio or video | |
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Analyze performance of function in c microcode | |
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Optimization of algorithm in embedded environment |
| Qualifications: |
|
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Master of EE/CS with 2 years of c/algorithm development experience in Audio or video | |
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Strong knowledge and ability in c programming in embedded system | |
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Experience of audio standards such AAC, AC-3 will be a plus | |
- |
Working background in optimization of different algorithmic blocks on DSPs will be a plus | |
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Should be a team player | |
| IC Design Engineer I |
| Job Description: |
|
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Module-level architecture definition and design | |
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Module-level RTL implementation | |
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Simulation/Verification at both module level and system level | |
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Module-level synthesis and timing analysis | |
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Writing design spec and report | |
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FPGA/silicon debug on related modules |
| Qualifications: |
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MSEE with minimum 1-year experience on digital IC design | |
- |
Solid knowledge on digital IC design | |
|
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Strong skills of Verilog RTL coding and simulation | |
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Familiar with C language | |
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Hands-on experiences on EDA tools, such as Cadence and Synopsys tools | |
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Relevant experiences on video display design/mpeg/demux/descramble are plus | |
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Hardworking and self-motivated | |
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A team player | |
| IC Design Engineer II |
| Job Description: |
- |
Micro-architecture definition/writing IC design spec | |
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RTL coding for logic modules | |
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Simulation/Verification of functionalities at both module level and top level. | |
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Do module level synthesis / timing analysis | |
|
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Writing complete design/verification reports | |
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Silicon debug of the related module functionalities | |
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Writing test patterns for production tests |
| Qualifications: |
|
- |
BSEE with minimum 3-year or MSEE with minimum 1-year experience of digital design | |
- |
Solid knowledge of digital design building blocks (eg. Data-path,Synchronizer,FIFO...) | |
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Strong skills of Verilog RTL coding and verification and debug | |
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Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc. | |
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Relevant experiences in DDR interface or Flash memory design is a plus | |
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Relevant experiences in customized circuit design is a plus | |
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Relevant experiences in DFT and mem Bist is a plus. | |
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Relevant experiences in low power design is a plus. | |
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Self-motivated and team player | |
| IC Design Engineer III |
| Job Description: |
|
- |
Design, evaluate and verify CMOS analog circuits | |
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Oversee layout and verification activities which include floor plan, LVS and DRC |
| Qualifications: |
|
- |
BSEE or MSEE | |
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Good fundamental in analysis and design of analog / mixed-signal circuits | |
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Experience in Verilog, AHDL and/or Matlab | |
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Ability to do layout and provide verification/debugging guidance | |
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Solid knowledge of EDA design tools. (Analog artist, spectre, HSPICE and nc-verilog ...) | |
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Familiar with Computer languages such as C, C++, perl | |
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Experience in any of the following areas is preferred: PLL, high-speed I/O’s | |
| IC Design Engineer IV |
| Job Description: |
|
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RF/analog IC design for tuners and receivers for multi-standard TV’s and other wireless systems | |
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Design and layout of IC blocks, such as LNA, mixer, VGA/PGA, LPF/BPF, VCO, crystal oscillator, PLL, ADC | |
| and DAC | ||
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Simulation of RF and analog circuits and systems in Spectre/SpectreRF and Matlab | |
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Testing and characterization of IC blocks and chips in lab, and ATE and field environments | |
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IC process and package evaluation including device modeling and PDK |
| Qualifications: |
|
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Over 1 years of experience in RF/analog design with MS or PhD in electric and electronic engineering | |
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Understanding receiver architectures for multi-standard TV products and other wireless systems | |
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Hands-on experiences in design of IC blocks to chip top levels in deep submicron CMOS technologies | |
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Proficient with simulation tools (Spectre/SpectreRF) and oversight of layout design | |
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Demonstrated ability for characterization of block and chip performances in lab and ATE environments | |
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Strong communication skills and also excellence as team player | |
| Software QA Engineer (Intern) |
| Job Description: |
|
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Create test plan and product description in English | |
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Implement test plan, report bugs in bug tracking system, reproduce bugs and perform debugging | |
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Full-time working; intern with excellent performance will have opportunity to become permanent | |
| employee. |
| Qualifications: |
|
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Senior in university, majored in computer or related field | |
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CET-4 at least | |
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Familiar with Microsoft Office and have strong documentation skills | |
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Familiar with software test flow, have basic programming experience in C, C++, | |
| or other development languages | ||
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Strong communication skills | |
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Strong logic mind, carefulness, self-motivation and strong sense of responsibility | |
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Having internship working experience in video related products is a plus. | |
| CAD Engineer |
| Job Description: |
|
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Support timing characterization flow for stand cell, IO, memory, analog IP | |
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Support EDA design flow. | |
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Perl/SKill/TCL script support. |
| Qualifications: |
|
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BSEE with minimum 3-year or MSEE with minimum 1-year of experience | |
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Stand cell library build and support with minimum 1-year of experience | |
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Familiar with EDA design flow for mixed-signal design | |
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Familiar with Computer languages such as C, C++, perl/TCL/C-shell | |
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Familiar with IT is a plus | |