Job Responsibility
We are looking for an experienced Switch Power IC design engineer to develop a high efficiency Buck PMIC for next generation DDR application. The Job includes but not limits to below items:
- Buck behavior model build up, key parameters simulation, fine tune and verification;
- Define specifications of blocks and create design documentation;
- All function block circuit level design, simulation and verification;
- Supervise layout floor plan and design of each function blocks;
- Silicon evaluation test, characterization and debugging;
- Production test development support.
Job Qualification
- BSEE or above with at least 2 years of experience in switch power IC development;
- Experience in switch power supply behavior model build up;
- Experience in Buck power IC circuit design;
- Ability to supervise layout floor plan and design;
- Good understanding of BCD process, model for switch power supply IC design;
- Proficiency of EDA design tools (Simplis, Spectre, HSPICE, etc);
- Good Lab experience in switch power IC testing;
- Good verbal and written communication and presentation skills, positive attitude;
- Willing to take challenges and to solve difficult technical problems;
- Quick learner.
Job Description
- Write micro-architecture definition/IC design spec;
- Write RTL coding for block or top level;
- Do IP level synthesis/timing analysis/formality check/CDC check /code coverage check;
- Assist on verification engineer to complete module and top level simulation and verification;
- Debug RTL/Gate Level waveform at module or top level;
- Do Silicon debugging of the related module functionalities and provide ECO solution accordingly.
Qualification
- MSEE with more than 5 years experience in digital design;
- Relevant experience in high speed IO IP design. PCIe design experience is a plus;
- Strong skills of Verilog RTL coding, simulation debug and base or metal layer ECO;
- Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.;
- Strong skills of Script and be familiar with TCL, Perl, etc.;
- Self-motivated, good team work spirit and good communication skills.
Job Description
- Work out test plan with designer;
- Develop test hardware and software on ATE to support mass production and engineering;
- Correlate test result between ATE and bench;
- Do ATE test repeatability and distribution study to make sure the robustness of the testing;
- Support DE/AE to fulfill device evaluation for new product on functional patterns and DC/AC parameters to guarantee the parameters meet design target or datasheet spec;
- Transfer ATE test hardware and software to subcon and share the knowledge to manufacturing engineers;
- Sustain the production line by trouble shooting any abnormality in the line;
- Optimize ATE testing or migrate to suitable platform to improve test coverage, reduce test time/cost and enhance testing performance.
Qualification
- Bachelor degree or above, major in Electronic Engineering or related;
- 2+ years of consumer electronics working experience;
- Be familiar with basic knowledge about digital and analog circuit and C language or other programming language;
- Have experience in IC testing or design, FPGA experience, high speed test experience, ATE debugging skill;
- Good written and oral communications skills;
- Good sense of responsibility and positive working attitude.
Job Description
The candidate will be responsible for design and characterization of high-speed analog/mixed-signal circuit blocks for ultra-high speed SerDes. Detailed responsibilities include:
- Taking an active role in block design implementation, verification and quality check;
- Supervising layout designers on physical implementation of SerDes circuits;
- Creating design documents for analog/mixed-signal design methodology.
Qualification
- Minimum MSEE with 3+ years of relevant industry experience;
- Hands-on experience in designing one or more of the following blocks: CTLE, DFE, PLL, CDR, TI SAR-ADC, analog/digital circuit calibration algorithm and implementation;
- Self-driven, excellent problem solving and analytical skill, good communication skills and a strong team player;
- Deep understanding of SerDes design and architecture such as adaptive signal processing/communication systems is a plus.
Job Description
- Write micro-architecture definition/IC design spec;
- Write RTL coding for block or top level;
- Do IP level synthesis/timing analysis/formality check/CDC check/code coverage check;
- Assist on verification engineer to complete module and top level simulation and verification;
- Debug RTL/Gate Level waveform at module or top level;
- Do silicon debugging of the related module functionalities and provide ECO solution accordingly.
Qualification
- MSEE with more than 5 years experience of digital design;
- Relevant experience in DDR memory controller IP design or IP integration;
- Strong skills of Verilog RTL coding, simulation debug and base or metal layer ECO;
- Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys DC, PT, etc.;
- Strong skills of Script and be familiar with TCL, Perl, etc.;
- Self-motivated, good team work spirit and good communication skills.
Job Responsibility
- DSP Compiler Architecture definition;
- Lead and participate in the DSP Compiler Development;
- Collaborate with peers in SW Architecture and DSP Hardware team.
Job Qualification
- MSEE with 8+ year experience or PhD with 5+ year experience of system software development or design;
- In depth knowledge of CPU/GPU/NPU architecture;
- Strong programming skills and knows how to optimize program to reach maximum performance under given hardware;
- Strong knowledge of hardware-software co-design and knows how to optimize the whole design to achieve high efficiency;
- Experience in building compiler using LLVM or equivalent.
Job Description
The candidate will be responsible for design and characterization of high-speed analog/mixed-signal circuits for ultra-high speed Serdes. Detailed responsibilities include:
- Participating in Serdes architecture design and block specification;
- Taking an active role in block design implementation, verification and quality check;
- Supervising layout designers on physical implementation of Serdes circuits;
- Monitoring junior design engineer to help them complete design task;
- Creating design documents for analog/mixed-signal design methodology.
Qualification
- Minimum MSEE with 7+ years of relevant industry experience;
- Deep understanding of Serdes design and architecture;
- Hands-on experience of CTLE, DFE, PLL, CDR, TI SAR-ADC, analog/digital circuit calibration algorithm and implementation;
- Direct experience in Serdes bring up, debug and characterization using lab equipment;
- Able to assume responsibility for a variety of technical tasks and to work independently;
- Self-driven, excellent problem solving and analytical skill, good communication skills and a strong team player.
Job Description
- Participate ASIC digital verification for various IP/SoC projects;
- Create verification plans with designers;
- Develop DV architecture and verification environment;
- Verification execution and sign-off.
Qualification
- Excellent team working style;
- Solid IP/SoC verification background;
- Mass production for verified IP/SoC;
- Bachelor with 2+ years of working experience in ASIC digital verification;
- Production experience in verification strategies and testplans;
- Familiar with System Verilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;
- Production experience in ARM buses, such as AXI/AMBA/APB is a plus;
- Familiar with verification tools ;
- Familiar with Linux, csh/Python or any script languages;
- Good English reading and writing skills.
Job Description
- Code development and code review on the PCIe/CXL driver;
- Daily debug of PCIe/CXL driver code;
- Interaction with hardware team and other software component teams.
Qualification
- MSEE in Computer Science, Computer Engineering or related fields;
- Experience in C/C++ programming language required;
- Familiar with Linux driver design;
- Strong skills of device driver coding using C/C++;
- Self-motivated, good team work spirit and good communication skills;
- Familiar with GPU driver development is a plus.
Job Description
- Design, simulation and verification of high speed CMOS analog and mixed-signal circuits;
- Co-work with layout engineer for physical implementation;
- Help define specifications of IC blocks and create design documentation;
- Silicon test, characterization and debugging.
Qualification
- MSEE;
- Solid knowledge and experience in high speed analog and mixed-signal circuit design;
- Experience in high speed I/O related area (Serdes, Transmitter, Receiver, DDR I/O interface, etc.) is a plus;
- Good understanding of deep submicron CMOS technology process and device physics;
- Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc.);
- Experiences in Verilog, Verilog-A, Python, and/or Matlab.