Social Recruitment

Job Description

  • Design, simulation and verification of high speed CMOS analog and mixed-signal circuits;
  • Co-work with layout engineer for physical implementation;
  • Help define specifications of IC blocks and create design documentation;
  • Silicon test, characterization and debugging.

Qualification

  • MSEE;
  • Solid knowledge and experience in high speed analog and mixed-signal circuit design;
  • Experience in high speed I/O related area (Serdes, Transmitter, Receiver, DDR I/O interface, etc.) is a plus;
  • Good understanding of deep submicron CMOS technology process and device physics;
  • Proficiency of EDA design tools (Virtuoso, Spectre, HSPICE, AMS, etc.);
  • Experiences in Verilog, Verilog-A, Python, and/or Matlab.

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Job Description

  • Build and execute verification for digital IC;
  • Study design specification and extract the verification items;
  • Create the verification plan;
  • Develop verification platform based on UVM;
  • Co-work with design team to clean the bugs in bench or design;
  • Run verification regression test;
  • Collect and analysis coverage and help convergence.

Qualification

  • MSEE with 2+ years working experience in UVM based IC verification;
  • Good team working style;
  • Good at Verilog/System Verilog coding;
  • Good at function coverage development is a plus;
  • Good at assertion based verification is a plus;
  • Familiarity with C programming is a plus;
  • Familiarity with Python programming is a plus;
  • Familiarity with DDR SDRAM is a great plus.

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Job Responsibility：

  • Develop virtual platform system, both creating new models as well as integrating third party models;
  • Develop and test new virtualization features in QEMU, KVM;
  • Validate implemented module from unit to unit integrated level;
  • Work closely with Software, SOC Design, and SOC Design Verification teams

Job Qualification：

  • Bachelor's degree in Computer Science;
  • 3+ years’ experience in SOC modeling, instruction set simulator development, or embedded software development;
  • Strong understanding of computer architecture concepts;
  • Proficient in C/C++ and scripting languages such as Python and Unix shell script;
  • Good communication skill, team work spirit, self-motivated; Preferred Qualification:
  • Familiarity with simulators such as Fast Models, Virtualizer, Virtual System Platform, QEMU;
  • Proficient in SystemC, Verilog, System Verilog, and Assembly;
  • Familiarity with industry standard technologies like AXI, PCIe, DDR;
  • Familiarity with RISC-V instruction set architecture;

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Job Description

  • Design, evaluate and verify CMOS analog circuits (PLL, DDR, USB, HDMI, ADAC, VDAC);
  • Oversee layout and verification activities which include floor plan, LVS and DRC.

Qualification

  • Master degree in ASIC design relevant;
  • Good fundamental in analysis and design of analog/mixed-signal circuits;
  • Experience in Verilog, AHDL and/or Matlab;
  • Ability to do layout and provide verification/debugging guidance;
  • Solid knowledge of EDA design tools (Analog artist, spectre, HSPICE and nc-verilog, etc.);
  • Familiar with Computer languages such as C, C++, perl;
  • Experience in any of the following areas is preferred: PLL, high-speed I/O’s;
  • Good communication skills and good oral/written English.

 

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Job Description

  • Write micro-architecture and integration design spec;
  • Write RTL coding for core and bus standard trace logic, monitor signal map, debug control, etc.;
  • Do IP level Linting/CDC check/synthesis/timing analysis/formality check;
  • Assist on verification engineer to complete module to top level verification and debugging;
  • Debug RTL and Gate Level waveform at top level to provide ECO solution in case of bug fixes;
  • Take silicon debugging of the related module functionalities.

Qualification

  • MSEE with 2+ year experience of digital design;
  • Strong skills of Verilog RTL coding, simulation debug and ECO changes with netlist database;
  • Hands on experience in EDA tools such as VCS, Spyglass, DC, PT, Equivalence check, etc.;
  • Basic skills of script and be familiar with Shell, Perl, Python, etc.;
  • Self-motivated, good team work spirit and communication skills;
  • Following working experiences will be one advantage：
    •  Experience in CPU or DSP design;
    •  Experience in AXI/AHB/APB protocols and ARM-based fabric design;
    • Experience in core or bus trace and debug, signal monitoring, MIPI, PCIe, JTAG related.

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Job Responsibility

  • Code development and code review on Big Data or AI library;
  • Interaction with hardware team and other software component teams.

Job Qualification

  • MSEE in Computer Science, computer engineer, mathematics or related fields;
  • Experience in C programming language required;
  • Familiar with application or library development;
  • Familiar with blas library is a plus;
  • Familiar with CNN operators is a plus;
  • Self-motivated, good team work spirit and good communication skills;
  • Familiar with OpenCL is a plus;
  • Familiar with RISC-V is a plus;
  • Self-motivated, good team work spirit and good communication skills.

 

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Job Description

  • Help develop next generation of solutions for advanced memory interfaces of data centers;
  • Perform high speed SI simulation and analysis;
  • Extraction of channel model using standard industry tools;
  • Lab measurements of interconnect channel in frequency and time domains.

Qualification

  • MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;
  • Solid knowledge of Electromagnetic and Microwave;
  • Experience in high speed SI/PI simulation and analysis;
  • Mastering measurement tools like oscilloscope, VNA, TDR/TDT;
  • Knowledge of a programming or scripting language in a Windows/UNIX environment;
  • Excellent technical communication skills.

 

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Job Description

  • Discuss with software engineers to understand their requirements of DSP;
  • Write micro-architecture definition of DSP subsystem;
  • Selection and configuration of DSP cores;
  • RTL integration of multiple DSP cores, RAM instances, FIFO, DMA engine to form DSP subsystem;
  • Synthesis/timing analysis/formality check/CDC check/Code coverage check of DSP subsystem;
  • Assist on verification engineer to complete module and top level simulation and verification;
  • Debug RTL/Gate Level waveform at module or top level;
  • Do silicon debugging of the related module functionalities and provide ECO solution accordingly.

Qualification

  • MSEE with 8+ year experience or PhD with 6+ year experience of digital design;
  • Strong knowledge in DSP including SIMD, vector operations, data loading & store organization;
  • Strong skills of Verilog RTL coding, simulation debug and base or metal layer ECO;
  • At least 3+ year experience in DSP design or integration;
  • At least 3+ year experience in AXI/AHB/APB protocols and ARM-based fabric design;
  • Hands on experience in EDA tools such as Cadence NC-Sim, Synopsys VCS, DC, PT, etc.;
  • Basic skills of Script and be familiar with TCL, Perl, etc.;
  • Self-motivated, good team work spirit and good communication skills.

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Job Responsibility：

  • Implement block level physical design from netlist to GDS, including floorplan, placement, CTS, routing, parasitic extraction, STA, Power analysis, Crosstalk analysis, physical verification and ECO;
  • Solve block level timing, congestion, and IR/EM issues;
  • Work with top level design engineers to achieve different sign-off requirements;
  • Develop block level P&R flow;
  • Work on or support full-chip implementation and design closure in different areas, such as Floorplan, IREM, and PV.

Job Qualification：

  • Bachelor or master degree in Engineering (Microelectronics, Electronics);
  • 5+ years of hands on experience in large scale ASIC chip physical design;
  • Experience with common EDA tools flow, ie: Innovus/Prime Time/Calibre;
  • Successful tape out experience is a plus;
  • Good teamwork and communication skills;
  • Familiar with scripting/programming (TCL, Perl, shell script, Python);
  • Good English reading and writing skills.

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Job Description

  • Code development and code review on the PCIe/CXL driver;
  • Daily debug of PCIe/CXL driver code;
  • Interaction with hardware team and other software component teams.

Qualification

  • MSEE in Computer Science, computer engineer or related fields;
  • Experience in C/C++ programming language required;
  • Familiar with Linux driver design;
  • Strong skills of device driver coding using C/C++;
  • Self-motivated, good team work spirit and good communication skills;
  • Familiar with GPU Driver development is a plus;

Apply