Social Recruitment

Support product qualification (Characterization/Correlation/ESD/LU/LifeTest/CornerLot, etc.) and maintain/enhance test yield and quality of devices in final test (FT) as well as wafer sort (CP);
Work on all issues related to device performance, undertake projects to reduce test cost and cycle time, and improve test efficiency;
Highly independent in developing product test solutions to existing and new requirements, attend to customers' feedback;
To work with internal teams (design, application etc.), sub-contractor (foundry, assembly&test etc.) and customer at all time;
Setup/transfer new products and technology for mass production in domestic and off-shore.

Degree in Electronics/Electrical Engineering;
Minimum 3 years of working experience in semiconductor industry;
Knowledge of IC product qualification (Characterization/Correlation/ESD/LU/Life Test/Corner Lot, etc.);
Knowledge of ATE testing, DFT/DFM and data analysis is necessary;
Process a good sense of responsibility and positive working attitude;
Ability to understand, debug, modify and improve test program is preferred;
Able to perform low yield analysis and drive issue fixing for products;
Able to manage sub-contractors in different locations.

In charge of keeping stable and good performance of assembly yield and process control;
In charge of qualifying the capability of assembly engineering to meet product assembly requirement;
Co-work with other group/department for new product developing & qualifying;
Co-work with assembly supplier to handle new product developing & qualifying;
Co-work with other group/department to handle abnormal case, resolve problem and assess the risk of effected product during production assembly;
In charge of generate, review and update document related to assembly process;
In charge of regular audit for assembly supplier.

At least bachelor degree, major in material or micro-electronic or other relative major;
Responsibility and hardships and hard work;
Assembly knowledge is preferred.

Package design feasibility study to provide the more competitive package solution;
Co-work with R&D team to optimize and generate the Bump map and Ball map;
Responsible for completing package designs; review the design files with subcon and substrate vendor; generate the package simulation model;
Optimize the assembly process and substrate built process to improve yield, reliability and cost saving;
Periodically survey the assembly technology and substrate build technology to update design rule.

Bachelor degree or above in microelectronics, material etc., Master is preferred;
Skillful in PCB or Substrate design tool;
Have basic understanding of electromagnetic field, thermal and mechanical;
Knowledge of semi-conductor process is a plus.