Open Positions

About Us:

Montage Technologies has opened a new U.S. location in the Johns Creek, GA area. We are a leading semiconductor company specializing in enterprise class memory products. There will be many hands-on learning experiences with significant program ownership and career growth.

Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing. 

Job Description:

We are looking for Verification Engineers who will help develop system level UVM test benches for various DDR5 DIMM products, Power Management IC (PMIC) and also CXL 2.0 products. Your contribution would be to lead and work with other global team members in building the infrastructure for system level SoC testing. You will also be responsible to functionally verify the system and IP components, using SystemVerilog and mixed signal verification techniques.


Key Responsibilities:

  • Be knowledgeable in DDR5 DIMM system level verification and PMIC IP verification; 
  • Collaborate closely with component testing verification teams across our global sites;
  • Interface with other engineering functions such as Design, Product, Spec Engineering;
  • Be involved in silicon debug when necessary;
  • Develop, drive and implement UVM SystemVerilog Testbench and infrastructure;
  • Develop stimulus, coverage, SV assertions, scripts as necessary;
  • Provide mentorship to junior engineers;
  • Debug regressions and failing simulations.

Qualifications:

  • BS or MS in Electrical Engineering, Computer Engineering or equivalent;
  • 5+ years of relevant work experience;
  • Good understanding of CMOS circuit design;
  • Strong understanding and hands on experience in building UVM Testbenches from scratch;
  • Proficient with digital and analog simulation tools, e.g.: VCS, Xcellieum, Verdi etc.;
  • Excellent debugging and problem solving skills;
  • Strong understanding of DDR5 protocol or CXL 2.0 spec.

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Job Responsibility:


  • Develop system board for IC validation; 
  • Work on IC function verification and performance test; 
  • Develop evaluation board for demonstration and evaluation; 
  • Develop reference board for customer design; 
  • Support customers to facilitate their product development cycles.

Job Qualification:


  • BSEE or MSEE with experience in hardware development; 
  • Experience in application development; 
  • Familiar with lab equipments, such as oscilloscope, spectrum analyzer, network analyzer, etc.

 

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职位描述

Senior Engineer Digital Design - Data Center Infrastructure Products

Montage Technologies has opened a new U.S. location in the Johns Creek, GA area offering a hybrid work environment.  We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products.  There will be many hands-on learning experiences with significant program ownership and career growth.

 

Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets.  Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets.  Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC).  Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability, and low-power memory solutions for high-performance computing.  Montage also designs products supporting the PCIe ecosystem, such as Repeaters, Clock Buffers, and Clock Synchronizers.

 

We are looking for a Senior level Digital Design Engineer with 3 to 5 years of experience who will help architect and develop RTL for various products with areas of focus in Digital Controls (e.g. PMICs), as well as Clock Buffers/Synchronizers.  The ideal candidate will have RTL to GDSII flow experience using industry standard tools.  In addition, knowledge of embedded micro-controllers such as RISCV and I2C/I3C/SMBus protocols are advantageous.  Your contribution would be to work with other global team members in designing both building blocks for the various products, as well as designing the entire new product for the company.

 

What your day would be like:

  • Individual contributor to the design in a collaborative team environment
  • Design various logic & state machines in SystemVerilog/Verilog RTL
  • Develop and debug RTL, using industry-standard simulation and synthesis tools, along with LEC, CDC/RDC, Lint, DFT and STA tools
  • Provide PPA (Power, Performance, Area) and schedule estimates, as well as design specifications for the RTL
  • Coordination with Verification/AMS design teams to ensure proper operation and functional and code coverage
  • Provide floor-planning and support integration of digital & analog circuits at top level
  • Work in cooperation with the methodology and CAD teams
  • Coordination with other stakeholders in identifying needs and improvements

 

Knowledge, Skills and Experience:

  • Must have 3 to 5 years of industry experience
  • Experience in high speed, low power digital design in advanced deep sub-micron processes
  • Proficient with SystemVeriolg/Verilog RTL, for both behavioral simulations and synthesis
  • Proficient with Design Compiler and PrimeTime
  • Programming/scripting know-how, e.g. Perl, Tcl and/or Python
  • Experience with Linux
  • Good communication skills, ability to take ownership
  • Experience with embedded micro-controllers is beneficial
  • Experience in Digital Control circuits for PMICs is beneficial
  • Experience in Clock Buffers and/or Synchronizers is beneficial
  • Some
  • Descriptions

岗位要求


  • Experience
  • Education

 

申请职位

About us:

Montage Technology has opened a new U.S. location in the Johns Creek, GA area. We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products. There will be many hands-on learning experiences with significant program ownership and career growth.

Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability and low-power memory solutions for high-performance computing. In addition to our memory products, our portfolio also includes PCIe re-timers and CXL memory expanders.


Job Responsibility:

Ownership of the specifications and drive JEDEC for the PMIC, SPD, TS, Security and any other logic products for DDR5 and DDR6. This is a single point person, a single voice in JEDEC TG and Committee. This role will need to write the internal FSD (Functional specifications document) for all products to be a superset of the JEDEC specifications, based on input from internal teams and customers. 

  • Attend Weekly JEDEC TG calls for PMIC, Security, TS, SPD, labels, Dimm modules, report weekly;
  • Attend Quarterly Committee meetings;
  • TG Chair for JEDEC PMIC TG;
  • Develop specifications for JEDEC for the various products; 
  • Own JEDEC PMIC 5030 spec and next PMIC specs;
  • Synchronize internally with our design and marketing team on the direction of JEDEC weekly;
  • Drive the cross functional data sharing of the fine details of each of the JEDEC TG’s and how it affects all of our products;
  • Develop material for the MRD (Marketing Requirements Document) of our new products;
  • Develop and own the internal FSD (Functional Specification Document) specifications of our products; 
  • Attend strategic customer calls to give the JEDEC overview to our customers and get their feedback and inputs for our products;
  • Help develop new product line for PMICs and Security Products for Automotive or SSD or other area that we are focused on.

Job Qualification:

  • 20+ Years Industry Experience;
  • Design background mandatory in memory interface products, SPD, TS, PMIC and Security Products;
  • Architecture and full chip design knowledge mandatory;
  • Spec writing skills;
  • Excellent written and verbal communication skills;
  • Public speaking to small and large groups;
  • In Depth knowledge of the JEDEC procedures and policies;
  • Experience with PCIe and CXL is a plus.

 

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