Open Positions

Job Responsibility:


  1. Work in a cross functional team environment, leading and contributing to the PMIC product development; 
  2. Full custom analog design of blocks such as PLLs, oscillators, bandgap references, LDOs, Buck / Boost, voltage regulators, high voltage detection circuits, ADCs, DACs, high speed comparators, etc.;
  3. Provide feasibility studies for size/performance/schedule;
  4. Planning and coordination with verification team to develop models for your blocks and to ensure full validation coverage;
  5. Provide floor-planning and support integration of digital & analog circuits at the full-chip level;
  6. Work in cooperation with the methodology and CAD groups;
  7. Interface between different teams to ensure successful path to production;
  8. Coordination with other stakeholders in identifying needs and improvements.

Job Qualification:


  1. 8+ years of Analog/Mixed Signal IC Design Experience; 
  2. PMIC design experience;
  3. BSEE required (MSEE/PhD preferred); 
  4. Experience of contributing towards several silicon tapeout cycles from spec to mass production;
  5. Design experience in CMOS/BiCMOS process is required;
  6. Experience working with small geometry BCD processes is a plus;
  7. Ideal candidate will have solid understanding of switching regulators, integrated power MOSFETs and drivers, LDOs, precision amplifiers, oscillators, bandgap references, ADCs, DACs, high-speed comparators;
  8. Proficient with Spectre and other analog simulators;
  9. Experience with Cadence schematic capture;
  10. Experience with Linux;
  11. Strong organizational skills and attention to detail;
  12. Good written/verbal communication skills & ability to take ownership;
  13. Knowledge of Verilog, Verilog-ams or other modeling / coding languages;
  14. Working knowledge of revision control tools such as SOS or SVN;

Apply

Job Responsibility:


  1. Write Micro-Architecture and Integration Design Spec; 
  2. Write RTL coding for core and bus standard trace logic, monitor signal map, debug control, etc.; 
  3. Do IP level Linting / CDC check / synthesis / timing analysis / formality check; 
  4. Assist on Verification Engineer to complete module to top level verification and debugging; 
  5. Debug RTL and Gate Level waveform at top level to provide ECO solution in case of bug fixes; 
  6. Take silicon debugging of the related module functionalities.

Job Qualification:


  1. MSEE or above with experience of digital design; 
  2. Strong skills of Verilog RTL coding, simulation debug and ECO changes with netlist database; 
  3. Hands on experience in EDA tools such as VCS, Spyglass, DC, PT, Equivalence check, etc.; 
  4. Basic skills of script and be familiar with Shell, Perl, Python, etc.; 
  5. Self-motivated, good team work spirit and communication skills; 
  6. Following working experiences will be one advantage: 
    Experience in DDR/ CPU/ GPU design;   
    Experience in AXI/AHB/APB protocols and ARM-based fabric design; 
    Experience in core or bus trace and debug, signal monitoring, PCIe, JTAG related. 

Apply

Job Responsibility:


  1.  Team environment with individual contributions to the design tasks; 
  2.  Full custom analog design of various blocks such as PLLs, oscillators, bandgap, LDO, voltage regulators and High voltage detection circuits;
  3.  Provide feasibility study for size/performance/schedule;
  4.  Planning and coordination with Verification/AMS design to ensure full validation coverage;
  5.  Provide floor-planning and support integration of digital & analog circuit at top chip level;
  6.  Work in cooperation with the methodology and CAD groups;
  7.  Interface between different teams to ensure successful path to production;
  8.  Coordination with other stakeholders in identifying needs and improvements.

Job Qualification:


  1.  Experience in analog and low power design using advanced deep micron process;
  2.  Proficient with Verilog RTL coding skills (Synchronous and Asynchronous state machines); 
  3.  Proficient with Hspice and other analog simulators;
  4.  Experience with Cadence schematic capture; 
  5.  Experience with Linux;
  6.  Good communication skills, ability to take ownership.

Apply

Job Responsibility:


  1. Design, evaluate and verify CMOS analog circuits ( PLL、DDR、USB、HDMI、ADAC、VDAC);   
  2. Oversee layout and verification activities which include floor plan, LVS and DRC.

Job Qualification:


  1. Bachelor degree or Master degree in ASIC Design Relevant;   
  2. Experience in RF/Analog IC design;   
  3. Good fundamental in analysis and design of analog / mixed-signal circuits; 
  4. Experience in Verilog, AHDL and/or Matlab; 
  5. Ability to do layout and provide verification/debugging guidance; 
  6. Solid knowledge of EDA design tools (Analog artist, spectre, HSPICE and nc-verilog ...); 
  7. Familiar with Computer languages such as C, C++, perl;   
  8. Experience in any of the following areas is preferred: PLL, high-speed I/O’s;   
  9. Good communication skills and Good oral/written English.

Apply

Job Responsibility:


  1. Validation: Develop and execute validation plans and test cases for DDR4 and DDR5 memory systems, ensuring compliance with industry standards. Validate memory component functionality, compatibility, and performance;
  2. Interconnect: Evaluate memory system equalization techniques and transmission line characteristics to optimize signal integrity and data transfer rates;
  3. Firmware and BIOS Development: Create firmware solutions to enhance memory system capabilities and compatibility;
  4. Margining Algorithms: Develop and implement margining algorithms to ensure robust operation under various operating conditions;
  5. Scripting and Programming: Utilize Python and C++ for test automation, firmware development, and data analysis to streamline validation processes;
  6. Test Development: Collaborate with design and architecture teams to design and execute innovative tests that stress memory systems to their limits;
  7. Data Analysis: Analyze validation results to identify and report issues, anomalies, and potential improvements in memory system performance;
  8. Cross-functional Collaboration: Collaborate with hardware and software teams to address and resolve validation and performance issues, ensuring product readiness for market release.

Job Qualification:


  1. Bachelor's or Master’s degree in electrical engineering or computer engineering;
  2. Strong experience in DDR4 and DDR5 memory system validation;
  3. 5+ years of relevant work experience;
  4. Experience with signal integrity and equalization techniques;
  5. Knowledge of DDR Training algorithms;
  6. Proficiency in Python and C++ programming for test automation, firmware development, and data analysis;
  7. Experience with memory controllers, firmware, and BIOS development is a strong plus;
  8. Solid understanding of memory system architecture and industry standards;
  9. Strong problem-solving skills and attention to detail;
  10. Excellent communication and teamwork skills;
  11. Experience in testing and validation methodologies;
  12. Experience mentoring junior engineers.

Apply

Job Responsibility:


  1. Participate ASIC digital verification for various IP/SoC projects;
  2. Create verification plans with designers;
  3. Develop DV architecture and verification environment;
  4. Verification execution and sign-off.

Job Qualification:


  1. Excellent team working style;
  2. Solid IP/SoC verification background;
  3. Mass production for verified IP/SoC;
  4. Bachelor with experiences on ASIC digital verification;
  5. Production experiences on verification strategies and testplans;
  6. Familiar with SystemVerilog/UVM for testbench creation, debug, reuse, constrained-random stimulus and functional coverage;
  7. Production experiences on ARM buses, such as AXI/AMBA/APB is a plus;
  8. Familiar with verification tools;
  9. Familiar with Linux, csh/Python or any script languages;
  10. Good English skills (read and write).

 

Apply

Job Responsibility:


  1. Firmware, driver, Middleware library, complier or security algorithm development;
  2. Unit test development and maintain;  
  3. Document maintain;  
  4. Troubleshoot, debug and maintain existing software;  
  5. Performance tuning

Job Qualification:


  1. Bachelor or above degree in computer science or related technical field;  
  2. Strong C/C++ programming ability;  
  3. Familiar with Code development Toolchain under Linux;  
  4. Self-motivated, good teamwork spirit and good communication skills;
  5. Preferred Qualifications:  
    Familiar with x86 or RISC-V architecture is preferred;  
    Familiar with Linux driver development is preferred;  
    Script language such as Python  is a plus;  
    Linux kernel knowledge is a plus.

 

Apply

Job Responsibility:


  1. Perform RTL to GDSII design flow, including floor planning, power grid design, place and route, clock tree synthesis, timing closure, power/signal integrity signoff, EM/IR; 
  2. Perform Full chip DRC/LVS/ANT/DFM; 
  3. Participate in next generation physical design, methodology and flow development.

Job Qualification:


  1. Bachelor degree or Master degree in Microelectronics; 
  2. Be familiar with RTL to GDSII design flow; 
  3. Be familiar with EDA tool; 
  4. Successful track records of taping out complex, 65/40/28 nm SOC chips; 
  5. Be familiar with Computer languages such as C, C++, perl/TCL/C-shell; 
  6. Be familiar with DC、PT、FM、DFT; 
  7. Self-motivated and good communication skills.

Apply

Job Responsibility:


  1. Perform analog and mixed-signal physical design;
  2. Perform layout verification (DRC, LVS);
  3. Modify and verify in-house DRC & LVS command files.

Job Qualification:


  1. BS with experience in IC layout experience; 
  2. Good understanding of basic electronic principles dealing with circuit and layout design;
  3. Familiar with IC layout methodologies and flows;
  4. Familiar with CAD tools such as Cadence virtuoso layout, PCELLs, Calibre physical verification;
  5. Familiar with Calibre DRC & LVS command files;
  6. Prior experience with stand-cell built is a plus.

 

Apply

Job Responsibility:


  1. Help develop next generation of solutions for advanced memory interfaces of data centers;
  2. Perform high speed SI simulation and analysis;
  3. Extraction of channel model using standard industry tools;
  4. Lab measurements of interconnect channel in frequency and time domains.

Job Qualification:


  1. MS in Electrical Engineering/Microwave/Physics/Computer Science/Math;
  2. Solid knowledge of Electromagnetic and Microwave;
  3. Experience in high speed SI/PI simulation and analysis;
  4. Mastering measurement tools like oscilloscope, VNA, TDR/TDT;
  5. Knowledge of a programming or scripting language in a Windows/UNIX environment;
  6. Excellent technical communication skills.

 

Apply