职位描述
Senior Engineer Digital Design - Data Center Infrastructure Products
Montage Technologies has opened a new U.S. location in the Johns Creek, GA area offering a hybrid work environment. We are a leading semiconductor company specializing in datacenter, enterprise infrastructure and memory interface products. There will be many hands-on learning experiences with significant program ownership and career growth.
Founded in 2004, Montage Technology is a leading IC design company dedicated to providing high-performance, low-power IC solutions for cloud computing and data center markets. Montage Technology provides industry leading DDR2 to DDR5 memory interface products for the demanding cloud computing and data center markets. Our robust product portfolio includes the critical components required by the memory modules, such as a Registering Clock Driver (RCD), Data Buffer (DB), SPD EEPROM with Hub (SPD Hub), Temperature Sensor (TS) and Power Management IC (PMIC). Compliant with JEDEC specifications, these products are designed for a variety of memory modules such as RDIMM, LRDIMM, NVDIMM, UDIMM, SODIMM, MRDIMM, etc., to enable high-speed, large-capacity, high-reliability, and low-power memory solutions for high-performance computing. Montage also designs products supporting the PCIe ecosystem, such as Repeaters, Clock Buffers, and Clock Synchronizers.
We are looking for a Senior level Digital Design Engineer with 3 to 5 years of experience who will help architect and develop RTL for various products with areas of focus in Digital Controls (e.g. PMICs), as well as Clock Buffers/Synchronizers. The ideal candidate will have RTL to GDSII flow experience using industry standard tools. In addition, knowledge of embedded micro-controllers such as RISCV and I2C/I3C/SMBus protocols are advantageous. Your contribution would be to work with other global team members in designing both building blocks for the various products, as well as designing the entire new product for the company.
What your day would be like:
- Individual contributor to the design in a collaborative team environment
- Design various logic & state machines in SystemVerilog/Verilog RTL
- Develop and debug RTL, using industry-standard simulation and synthesis tools, along with LEC, CDC/RDC, Lint, DFT and STA tools
- Provide PPA (Power, Performance, Area) and schedule estimates, as well as design specifications for the RTL
- Coordination with Verification/AMS design teams to ensure proper operation and functional and code coverage
- Provide floor-planning and support integration of digital & analog circuits at top level
- Work in cooperation with the methodology and CAD teams
- Coordination with other stakeholders in identifying needs and improvements
Knowledge, Skills and Experience:
- Must have 3 to 5 years of industry experience
- Experience in high speed, low power digital design in advanced deep sub-micron processes
- Proficient with SystemVeriolg/Verilog RTL, for both behavioral simulations and synthesis
- Proficient with Design Compiler and PrimeTime
- Programming/scripting know-how, e.g. Perl, Tcl and/or Python
- Experience with Linux
- Good communication skills, ability to take ownership
- Experience with embedded micro-controllers is beneficial
- Experience in Digital Control circuits for PMICs is beneficial
- Experience in Clock Buffers and/or Synchronizers is beneficial
- Some
- Descriptions
岗位要求
- Experience
- Education