M88DR5CK01P (DDR5 CK01P)

M88DR5CK01P is an upgraded Gen1 DDR5 Clock Driver (CK01P) designed for client memory applications. Supporting data rates of up to 9200MT/s, it provides stable and reliable clocking for next-generation DDR5 client memory modules, enabling client platforms to deliver enhanced performance in the AI era. Compliant with the JEDEC DDR5CKD01 specification, the CK01P supports three clock driving modes: single PLL, dual PLL, and PLL bypass. It features a zero-phase-delay clocking architecture and supports programmable per-channel latency. Output characteristics can be configured through control registers to flexibly match different DIMM network topologies.

M88DR5CK01P (DDR5 CK01P)
DDR5 CSODIMM
M88DR5CK01P (DDR5 CK01P)
DDR5 CUDIMM
Features
  • Compliant with JEDEC DDR5 Clock Driver Definition (DDR5CKD01) specificationCompliant with JEDEC DDR5 Clock Driver Definition (DDR5CKD01) specification
  • Support speed up to DDR5-9200Support speed up to DDR5-9200
  • 1.1V VDD voltage1.1V VDD voltage
  • Output characteristics configurable through control registersOutput characteristics configurable through control registers
  • Clock driver with zero phase delayClock driver with zero phase delay
  • Programmable latency per channelProgrammable latency per channel
  • I²C and I3C Basic interfaceI²C and I3C Basic interface
  • Dual-sideband bus addressDual-sideband bus address
  • Ultra-low power consumptionUltra-low power consumption
  • RoHS compliantRoHS compliant
  • Green package: 35-ball Fine-Pitch Ball Grid Array (FPBGA)Green package: 35-ball Fine-Pitch Ball Grid Array (FPBGA)
Applications

DDR5 CUDIMM, CSODIMM, CQDIMM and CAMM

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