M88DR5CK01P (DDR5 CK01P)
M88DR5CK01P is an upgraded Gen1 DDR5 Clock Driver (CK01P) designed for client memory applications. Supporting data rates of up to 9200MT/s, it provides stable and reliable clocking for next-generation DDR5 client memory modules, enabling client platforms to deliver enhanced performance in the AI era. Compliant with the JEDEC DDR5CKD01 specification, the CK01P supports three clock driving modes: single PLL, dual PLL, and PLL bypass. It features a zero-phase-delay clocking architecture and supports programmable per-channel latency. Output characteristics can be configured through control registers to flexibly match different DIMM network topologies.
Features
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Compliant with JEDEC DDR5 Clock Driver Definition (DDR5CKD01) specification
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Support speed up to DDR5-9200
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1.1V VDD voltage
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Output characteristics configurable through control registers
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Clock driver with zero phase delay
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Programmable latency per channel
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I²C and I3C Basic interface
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Dual-sideband bus address
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Ultra-low power consumption
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RoHS compliant
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Green package: 35-ball Fine-Pitch Ball Grid Array (FPBGA)
Applications
DDR5 CUDIMM, CSODIMM, CQDIMM and CAMM
For product details, please contact us.

PCIe® Interconnect
CXL® Interconnect
