Memory Interconnect
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The M88MR5RCD01 is a first-generation DDR5 Multiplexed Rank Registering Clock Driver (MRCD) chip that supports data rates of up to 8800 MT/s. This chip buffers and re-drives the address, command, clock, and control signals from the memory controller. Compared to traditional DDR5 RCD chips, the MRCD can generate four independent chip-select signals at standard rates, enabling more flexible and efficient memory management operations. Working in conjunction with Multiplexed Rank Data Buffer (MDB) chips, the MRCD chip is applied in next-generation DDR5 MRDIMM/MCRDIMM memory modules, effectively doubling memory system bandwidth to meet the urgent demand for memory throughput in applications such as deep learning and large-scale data analysis.
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Speed up to 8800 MT/s -
Two sub-channels, each divided into two pseudo-channels to increase the total bandwidth of the host system
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Two pseudo-channels splitting the incoming CA inputs and generating separate CA outputs
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Integrated PLL clock driver distributing one differential clock pair to five differential pairs per channel
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Parity checking across CA and DPAR inputs separately on two sub-channels
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Integrated BCOM bus to control the multiplexed data buffers (MDB)
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Output characteristics configurable through control word registers
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Sideband bus interface supporting I²C and I3C Basic modes
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CA, CS, DFE and BCOM training modes supported
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Multiple power-saving modes
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1.1V VDD and 1.0V VDDIO voltages
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Green package: 240-ball FCBGA
DDR5 MRDIMM/MCRDIMM
